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TLC2543.rar
- 模数转换TLC2543十二位串行芯片驱动程序,经用已得证实.用都只需根据需要修改即可.,Analog-digital conversion chip TLC2543 12 serial driver, was confirmed by the use has. Using both can be modified only as needed.
AD9826.rar
- 图像采集传感器CCD专用的AD转换器-AD9826驱动程序,VHDL语言。,CCD image acquisition sensor dedicated AD converter-AD9826 driver, VHDL language.
AD7938controllor-VHDL
- VHDL语言的有限状态机法控制8位/12位自动转换通道模数转换器AD7938-VHDL, FSM method to control 8-bit/12-bit ADC AD7938 auto-conversion channel
AD-Based_on_FPGA.rar
- 使用VHDL语言编写的A/D转换程序,可在FPGA平台使用,VHDL language used A/D conversion process can be used in the FPGA platform
CORE8051_ADC_OK_328
- 这是一个在Fusion系列的AFS600的FPGA,在里面嵌入51核和12位adc模块,可以在lcd12864上显示,能正常转换电压。做adc使用。-This is a AFS600 at the Fusion series FPGA, embedded in which 51 nuclear and 12-bit adc module, you can show up at lcd12864 to the normal voltage conversion. Does the use of a
SHFRT4_1
- 四位串入并出移位寄存器,实现串并转换,已通过时序验证-Four series in and out of shift register, to achieve string and conversion, has passed the timing verification
ADcontroller
- FPGA控制AD7610采样.此为通用控制器模块.其中ADC16BITs串行传入FPGA后,串行数据转换成16BIT并行数据-ADC controller
calculator
- 用VHDL在quartus2下实现的计算器。输入为4*4矩阵键盘,输出为共用数据线的数码管。可以实现简单数学运算、逻辑运算、进制转换、连续运算等功能。-Using VHDL in quartus2 achieve calculator. Input 4* 4 matrix keyboard, the output data lines for sharing of digital control. Can achieve a simple mathematical operations, log
YCbCr_RGB_10bit
- YCbCr 转 RGB模块,以应用于项目中。 该模块可将10bitYCbCr分量视频转换为12bitRGB视频,需消耗乘法器。-YCbCr turn RGB module, to apply to the project. The module can be 10bitYCbCr component video converted to 12bitRGB video, need to consume multiplier.
YCbCr2RGB
- verilog 实现的YCbCr到RGB得转换-verilog implementation YCbCr to RGB was converted
cameralink
- 由于目前基于CameraLink接口的各种相机都不能直接显示,因此本文基于Xilinx公司的Spartan 3系列FPGAXC3S1000-6FG456I设计了一套实时显示系统,该系统可以在不通过系统机的情况下,完成对相机CameraLink信号的接收、缓存、读取并显示 系统采用两片SDRAM作为帧缓存,将输入的CameraLink信号转换成帧频为75Hz,分辨率为1 024×768的XGA格式信号,并采用ADV7123JST芯片实现数模转换,将芯片输出的信号送到VGA接口,通过VGA显示器显示
saa7113
- ccd摄像头模拟信号转换为数字信号 芯片 配置sa7113-ccd camera convert analog signals into digital signals chip configuration sa7113
ds18b20
- 单路DS18B20的verilog HDL 代码,精度为1℃无须转换数据,直接输出结果。占用300个LE资源。-Single DS18B20 the verilog HDL code, and an accuracy of 1 ℃ without converting the data, direct output. Occupy 300 LE resources.
video_formatter
- 数字video BT601格式转换成BT656/SMPTE格式-Digital video BT.601 format converts to BT656 format or SMPTE format.
VGA
- 压缩包中包含了用Verilog编写的视频控制模块,实现PAL制式到VGA制式的实时转换,同时包含了VGA专用ram配置模块,可直接实用-Compressed package includes the preparation of the video with the Verilog control module, PAL format to achieve real-time conversion to standard VGA, VGA also includes dedicated ram
vhdlad
- 基于VHDL的高速串行AD转换器控制设计与实现-VHDL-based high-speed serial AD converter control design and implementation
TCL2543
- 基于FPGA的TLC2543控制器,采用状态进行控制ADC进行转换-The TLC2543 controller based on FPGA, using state control of ADC conversion
TLC549(AD)
- 基于TLC549的串行A/D转换-Based on the TLC549 serial A/D conversion
01.ISE8.2
- 这个是我用的合众达试验箱里面的资料。合众达试验箱里面集成的是xilinx的virtex4,这个是在ise环境中审计的程序,包括led,da/ad转换实验,键盘实验,以及rtc读取和lcd显示等。-vhdl programs that used by xilinx virtex4
color_conv
- BT656,YCBCR数据格式转换成VGA(888)数据算法,-BT656, YCBCR data format converted into VGA (888) data algorithm,